1. Field of the Invention
The present invention generally relates to a liquid crystal display and a method of producing the same, and more particularly, to a method for the liquid crystal display having this structure to more conveniently perform a cell test.
2. Description of the Prior Art
Thin film transistor liquid crystal displays are made up of array-arranged thin film transistors, suitable capacitors, bounding pads and other electrical devices to drive dot pixels and further produce rich and colorful images. Since thin film transistor liquid crystal displays have the advantages of having a small volume, having low power consumption, and being radiation free, they have been widely applied to laptops, PCs and personal digital portable information products, and have tended to replace the traditional CRT monitors of desktop PCs.
Please refer to FIG. 1 and FIG. 2. FIG. 1 is a schematic diagram of a liquid crystal display. FIG. 2 is the internal schematic diagram of a data line driving IC mounting area in FIG. 1. As shown in FIG. 1, a liquid crystal display 10 comprises a bottom substrate 12 and a top substrate 14 positioned on top of the bottom substrate 12. A liquid crystal molecular layer (not shown) is filled between the top substrate 14 and the bottom substrate 12, wherein the top substrate is indicated by a dotted line to prevent confusion. Additionally, the liquid crystal display 10 includes a plurality of scanning lines 16 and data lines 18, each scanning line 16 and data line 18 is positioned on the bottom substrate 12, and each scanning line is perpendicular to each data line 18. On the other hand, the top substrate 14 is a color filter for displaying the color images of the liquid crystal display 10.
In addition, as FIG. 1 shows, the bottom substrate 12 includes at least one scanning line driving IC mounting area 20 for installing a scanning driving IC (not shown), and a plurality of data line driving IC mounting areas 22 for installing data driving ICs (not shown), wherein the scanning line driving ICs output a clock signal to each scanning line 16, and each data line driving IC output image information to each data line 18. Furthermore, as FIG. 2 shows, each data line driving IC mounting area 22 includes a shorting bar 24 and a plurality of bounding pads 26, wherein each data line 18 at the data line driving IC mounting area connects to the shorting bar 24, and each bounding pad 26 is for bounding each bump of data line driving IC on. Moreover, since the internal structure of the scanning line driving IC mounting area 20 is similar to each data line driving IC mounting area 22, the structure description is omitted.
In general, before each data line driving IC and each scanning line driving IC are bounded on each data line driving IC mounting area 22 and scanning line driving IC mounting area 20, a cell test of a liquid crystal display 10 is performed in order to check in advance whether any abnormal color image exists. When the liquid crystal cell text is completed, a laser is utilized to cut off the connection between shorting bar 24 and each data line 18, followed by bounding each data line driving IC on each data line driving IC mounting area 22, and bounding the scanning line driving IC on the scanning line driving IC mounting area 20.
Moreover, in the aforementioned cell test, the shorting bar 24 is utilized for inputting a test signal to each data line 18, followed by checking the color image of the LCD 10 artificially. The shorting bar 24 has to connect to a test pad to receive the test signal. Therefore the signal can pass through the test pad to the shorting bar 24. However, as FIG. 2 shows, each bounding pad 26 occupies most of the space of the data line driving IC mounting area 22, therefore there is not enough space for installing a test pad for shorting bar 24 at the data line driving IC mounting area. Besides, even though the test pad is installed outside of the data line driving IC mounting area 22, the shorting bar 24 cannot be extended to the outside of data line driving IC mounting area 22 due to the short distance d between two neighboring bounding pads 26.
Consequently, please refer to FIG. 3. FIG. 3 is a schematic diagram of the cell test according to prior art. As FIG. 3 shows, the prior cell test generally attaches a conductive elastic 28 to the surface of each shorting bar 24. Thereafter a test signal is input to the conductive elastic 28, and the test signal passes through the shorting bar 24 to each data line 18. However, accordingly, the cell test inputs the same signals to each data line 18. Hence the red dot pixels, green dot pixels and blue dot pixels cannot be tested individually. Therefore, some defects cannot be found and the operators are not able to gain the complete defect information.